So, we’ve already discussed CPUs, GPUs, and motherboards. But we haven’t discussed RAM! LET’S FIX THAT.
RAM stands for “Random Access Memory”. The name, like many in computer hardware, is antiquated and emphasizes aspects of memory that nobody cares about anymore. Although almost every component in a computer has some amount of random-access memory attached, most people are referring to the “main memory” in computers when they talk about RAM. For this conversation, we’re only talking about SDRAM, or Synchronized Dynamic RAM, which is the type of RAM used in desktop computers.
RAM only has two jobs: it holds a ton of data, and when the CPU asks for a specific piece of data, it finds that piece and returns it to the CPU as efficiently as possible (both in terms of bandwidth — megabytes transferred per second — and latency — time between the CPU asking for data and the RAM returning it). Although that’s not too much to do, there’s still plenty of jargon to analyze when discussing RAM.
We’re going to split this up into the EASY MODE terminology about RAM (self-evident information), and HARD MODE terminology (which requires understanding the nitty-gritty details of how RAM works).
CAPACITY: This represents how much information can be stored in memory at once. More is better.
PIN COUNT: It’s the number of connections made between the RAM and the motherboard (if you count the little gold tabs at the bottom of your stick of RAM, that’s your pin count). Your motherboard only supports a certain type of RAM (usually 240-pin DDR3). Obnoxiously, two different generations of RAM can have the same pin count but not both be usable by the same motherboard, so make sure both pin count AND generation of DDR match between your RAM and your motherboard’s supported spec sheet.
DDR GENERATION (DDR1 vs DDR2 vs DDR3): Changes in generation represent major shifts in the internal design of RAM. Each generation is incompatible with the others, so you can’t install DDR2 RAM on a motherboard that supports DDR3. Later generations consume less energy and offer higher clock speeds (they also add more latency, but the higher clock speeds offset that). The “DDR” itself stands for “double data rate”, and it refers to the fact that all DDR memory can do two operations per clock cycle.
VOLTAGE: How much power it consumes. In general, DDR consumes 2.5V, DDR2 consumes 1.8V, and DDR3 RAM consumes 1.5V. You can buy RAM that doesn’t conform fully to this spec, but most RAM will match those numbers.
BUFFERED/REGISTERED RAM: Buffers/registers help the RAM during periods of prolonged access, and keeps RAM more stable, but it costs more money to purchase and adds latency. You don’t need it if you aren’t working on a server.
DDR[X]-[Y] PC[X]-[Z]: You’ll see this format appear on some RAM spec sheets. The “X” represents which generation DDR SDRAM is used (it will always be the same as the number after “PC”). “Y” represents the effective clock speed, or, how many operations it can perform per second. (Note that this number is actually double the real clock speed, due to DDR’s two-actions-per-cycle methodology). Finally, “Z” represents the maximum theoretical transfer rate in megabytes/second, or, its max bandwidth. Since DDR RAM transfers 8 bytes per operation, this number is always just 8 * clock speed in megahertz.
As you may know, RAM only thinks of data in terms of addresses — for instance, instead of asking RAM
what is the value of myInt, you’d look up the address of
myInt, see that it’s
0x0f3c, and then ask the RAM for the data located at
0x0f3c. Well, internally, RAM memory banks are stored as a 2-dimensional table. So, once it receives that instruction, the RAM may internally split
address 0x0f3c into
0x3c, in order to create the instruction
read the data at row 0x0f, column 0x3c. Memory is stored in row major order, meaning that you read memory along rows, not along columns. With that in mind, let’s look at how to determine RAM latency.
TIMING: You’ll often see timing numbers that look like “A-B-C-D” or “A-B-C-D-E”. Each number represents the latency in performing certain operations. The smaller the numbers, the less latency, the better your RAM is. In order: A represents CAS Latency, B represents RAS to CAS delay, C represents RAS precharge delay, and D represents Row Active Time. If listed, E represents Command Rate. We’re going to define each term in a different order than it’s listed in the timing specs.
RAS AND CAS: These stand for “Row Access Strobe” and “Column Access Strobe”. Basically, it means “this latency appears when we look at a different row” or “this latency appears when we look at a different column”.
RAS PRECHARGE DELAY: Whenever you need to look at a new row of memory, you have to wait for a certain amount of clock cycles for that row to be prepared. If your current memory read is off the same row as your previous memory read, that row is already prepared and you don’t need to pay this cost. Referred to sometimes as tRP.
RAS to CAS DELAY: This represents the amount of clock cycles the RAM has to wait between defining which row to read and which column to read. Referred to sometimes as tRCD.
CAS LATENCY: This represents the amount of clock cycles the RAM has to wait after the address row and column are specified before it gets the data in that row/column back to send out. Referred to sometimes as tCAS. This is the most well-known source of latency, but really, RAS to CAS is just as important. So pay attention to your entire timing specs, not just a separately-listed CAS Latency spec.
ROW ACTIVE TIME: This represents the amount of clock cycles the RAM has to wait between activating a row and de-activating it in order to access a new row. Ideally, it should equal CAS latency + RAS-to-CAS delay + 2 clock cycles, or, the amount of time taken to read data from a row after it’s activated plus two clock cycles to push out the memory to the CPU.
COMMAND RATE: Often not represented in the timing numbers, because it’s not that important. Represents the time between activating a memory chip and it being able to receive its first command.
LATENCY: Your actual latency between deciding you want memory at a certain address and receiving it will vary depending on what memory has been accessed previously, but at worst, it is equal to RAS precharge + RAS to CAS delay + CAS latency (or, the sum of the first three numbers in your timing specs).